1. Field of the Invention
The present invention generally relates to a lithographic apparatus and a system and method for non-destructive testing of trusted integrated circuits fabricated in an untrusted foundry to secure authenticity of the integrated circuits.
2. Related Art
A lithographic apparatus is a machine that applies a desired pattern onto a substrate or part of a substrate. A lithographic apparatus can be used, for example, in the manufacture of flat panel displays, integrated circuits (ICs) and other devices involving fine structures. Such a lithographic apparatus can be mask-based or maskless. In a conventional apparatus, a patterning device, which can be referred to as a mask or a reticle, can be used to generate a circuit pattern corresponding to an individual layer of a flat panel display (or other device). This pattern can be transferred onto all or part of the substrate (e.g., a glass plate), by imaging onto a layer of radiation-sensitive material (e.g., resist) provided on the substrate.
Instead of a circuit pattern, the patterning device can be used to generate other patterns, for example a color filter pattern or a matrix of dots. Instead of a mask, the patterning device can be a patterning array that comprises an array of individually controllable elements. The pattern can be changed more quickly and for less cost in such a system compared to a mask-based system.
Lithographic apparatus designed to expose a substrate of an IC can provide an exposure region that covers a full dimension of the substrate, or covers a portion of the dimension (for example half of the width). The substrate can be scanned underneath the exposure region, while the mask or reticle is synchronously scanned through a beam. In this way, the pattern is transferred to the substrate. If the exposure region covers the full dimension of the substrate then exposure can be completed with a single scan. If the exposure region covers, for example, half of the width of the substrate, then the substrate can be moved transversely after the first scan, and a further scan is typically performed to expose the remainder of the substrate.
IC's made in semiconductor foundries are vulnerable to tampering. Tampering can result in unexpected failures in the field use of IC's, which is unacceptable particularly in critical areas such as medical electronics and/or military applications. Reports from U.S. government offices document the problem of IC tampering in untrusted, especially off-shore, foundries. See, for example, February 2005 report from the Defense Science Board Task Force on High Performance Microchip Supply. A recent broad agency announcement from DARPA highlight the need for solutions—DARPA/MTO, BAA 07-24 “Trust in Integrated Circuits”, April 2007. Such security needs transcend government interests and also affect commercial operations, as noted in “Fake components delay designs in Israel,” EETimes, March 2007, URL: http://www.eetimes.com/showArticle.jhtml?articleID=198701043.
Typically, in maskless lithography, original circuit pattern data is stored in a Graphic Data System (GDS or GDS II) in the form of image data. In an untrusted foundry, lack of control could result in a substitute GDS file or mask to be inserted into the process, thereby leading to a tampered with final IC. Sufficient controls to guard against intrusive patterns, counterfeit copies of IC designs, or unwanted alterations may not be in place at all foundries. The burdens required to insist on stricter controls on protocol are likely cost prohibitive.
Conventional systems may merely rely on the trustworthiness of a foundry when determining whether or not an IC or a batch of ICs is to be trusted. Alternatively, some systems test sample ICs using reverse engineering or by physically taking the IC apart layer by layer. With these conventional testing standards there may not be assurety if each and every IC will be authentic. Further, these methods are inherently destructive by nature leading to the test IC becoming unusable after the test is carried out with no 100% guarantee that any other IC in the lot will be authentic. In other words, trust cannot be added to ICs after fabrication and mere electrical testing and/or reverse engineering cannot be relied upon to detect undesired alterations in ICs on an IC-by-IC basis.